1. Field of the Invention
This invention relates generally to read only memory circuits and more particularly to column select circuits and sense amplifiers for use in a read only memory. 2. Description of the Prior Art
Typically, read only memory circuits (ROMs) utilize dynamic or static row and column select schemes. For example, one type of dynamic row select scheme precharges all rows of a ROM array as a result of a precharge pulse signal. A predetermined column is then selectively coupled to an individual sense amplifier in response to a column decoder which is controlled by address lines of the ROM. Logic "low" and "high" levels are produced by the presence or absence of a program transistor at the intersection of a row and column in the ROM. At the end of the precharge pulse, a load will charge the column in the absence of a program transistor. A disadvantage of the prior art has been the inability to charge the capacitance associated with the column in a short period of time, thereby limiting the access time. A prior improvement in the speed of the circuit has been achieved by decoupling the column capacitance. However, a limitation of this improvement has been the necessity to sink all the current from the column load in order to produce a "low" logic level. Circuits which decouple the column capacitance consume more power and the decoupling is susceptible to process and supply voltage variations.
Usually, the ROM output voltage is not within the range associated with a logical "high" or "low" level for the remainder of the circuit. Therefore, a sense amplifier is connected to the ROM output to translate the output to a valid logical "high" or "low". Sense amplifiers commonly have size disadvantages and increase the access time.